FIG. 1 is a diagram of a typical thin film transistor liquid crystal display (TFT-LCD) module 1. The TFT-LCD module 1 includes a liquid crystal display (LCD) panel 5, a drive circuit 2, and a backlight 7. The drive circuit 2 has a plurality of gate driver integrated circuits (ICs) 6A-6B and source driver ICs 6C-6E for driving a LCD panel 5. A plurality of printed circuit boards (PCBs) receive a variety of circuit components such as a timing controller (not shown). The LCD panel 5 is liquid crystal inserted between two glass substrates. The LCD panel 5 enables the transmission of white light, from the backlight 7, to a given pixel in order to express color images. Each pixel has a pixel signal voltage generated by the driving circuit 2 that determines where the LCD transmits the light. The backlight 7 has a lamp 8 and a reflex plate 9. The backlight 7 generates white light with the lamp 8 acting as the light source.
As is well known in the art, the LCD panel 5 includes gate lines and source lines which are intersected in a lattice shape. A pixel is the intersection of a gate line and a data line. For example, an LCD panel for a VGA (video graphics array) mode includes 640×480 pixels and an LCD panel for an XGA (extended graphics array) mode includes 1024×768 pixels. To drive a number of pixels, a gate driver IC, e.g., 6A, and a source driver IC, e.g., 6C, have a number of output pins. The number of these output pins is related to the resolution of the LCD panel 5 that the IC services. Since an IC cannot have innumerable output pins, the LCD module 1 uses a plurality of serially connected ICs. For example, since the LCD panel for the VGA mode has 640 source lines, a source driver IC 6C having 320 output pins must be serially connected to a second source driver IC 6B with 320 out pins.
A semiconductor IC is, generally, tested by assigning test pins to all of the input and output pins, and then connecting the test pins to an appropriate test device. With the advent and development of high definition LCD panels, the number of output pins installed to the drive circuit 2 is increasing and therefore the distance between pins is decreasing. This leads to a difficulty in testing the drive circuit 2 because of the increasing number of test pins needed on an appropriate test device to properly test the drive circuit 2.